// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  task_slot_cfg_reg_offset.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  Yau Shek Fan
// Version       :  1.0
// Date          :  2017/7/10
// Description   :  The description of Hi MINI project
// Others        :  Generated automatically by nManager V4.2 
// History       :  Yau Shek Fan 2018/03/19 11:46:49 Create file
// ******************************************************************************

#ifndef __TASK_SLOT_CFG_REG_OFFSET_H__
#define __TASK_SLOT_CFG_REG_OFFSET_H__

/* TASK_SLOT_CFG Base address of Module's Register */
#define SOC_TASK_SLOT_CFG_BASE                       (0x8000)

/******************************************************************************/
/*                      SOC TASK_SLOT_CFG Registers' Definitions                            */
/******************************************************************************/

#define SOC_TASK_SLOT_CFG_TS_CFG_REG                (SOC_TASK_SLOT_CFG_BASE + 0x0)   /* Task slot config */
#define SOC_TASK_SLOT_CFG_TS_CTRL_REG               (SOC_TASK_SLOT_CFG_BASE + 0x8)   /* Task slot control */
#define SOC_TASK_SLOT_CFG_TS_SECURE_REG             (SOC_TASK_SLOT_CFG_BASE + 0xC)   /* Taskslot secure config */
#define SOC_TASK_SLOT_CFG_TS_ALLOC_GOAL_REG         (SOC_TASK_SLOT_CFG_BASE + 0x20)  
#define SOC_TASK_SLOT_CFG_TS_ASSIGN_TAB_REG         (SOC_TASK_SLOT_CFG_BASE + 0x24)  /* Task slot's AI core assignment result from main scheduler */
#define SOC_TASK_SLOT_CFG_TS_OVR_GOAL_REG           (SOC_TASK_SLOT_CFG_BASE + 0x28)  /* Task slot's overrided goal */
#define SOC_TASK_SLOT_CFG_TS_OVR_ASSIGN_REG         (SOC_TASK_SLOT_CFG_BASE + 0x2C)  /* Task slot's overrided assignement setting */
#define SOC_TASK_SLOT_CFG_TS_CURRET_CORE_USEAGE_REG (SOC_TASK_SLOT_CFG_BASE + 0x40)  /* Current usage of AI cores */
#define SOC_TASK_SLOT_CFG_TS_STATUS_REG             (SOC_TASK_SLOT_CFG_BASE + 0x50)  /* Task slot status */
#define SOC_TASK_SLOT_CFG_TSC_DFX_CODE_REG          (SOC_TASK_SLOT_CFG_BASE + 0x54)  
#define SOC_TASK_SLOT_CFG_TSC_TERM_CODE_REG         (SOC_TASK_SLOT_CFG_BASE + 0x58)  
#define SOC_TASK_SLOT_CFG_TSC_CORE_DEBUG_REG        (SOC_TASK_SLOT_CFG_BASE + 0x60)  
#define SOC_TASK_SLOT_CFG_TSC_CORE_EXCEPTION_REG    (SOC_TASK_SLOT_CFG_BASE + 0x64)  
#define SOC_TASK_SLOT_CFG_TS_LAST_CORE_ID_REG       (SOC_TASK_SLOT_CFG_BASE + 0x70)  /* The latest block ID of the task */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_0_REG          (SOC_TASK_SLOT_CFG_BASE + 0x80)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_1_REG          (SOC_TASK_SLOT_CFG_BASE + 0x84)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_2_REG          (SOC_TASK_SLOT_CFG_BASE + 0x88)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_3_REG          (SOC_TASK_SLOT_CFG_BASE + 0x8C)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_4_REG          (SOC_TASK_SLOT_CFG_BASE + 0x90)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_5_REG          (SOC_TASK_SLOT_CFG_BASE + 0x94)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_6_REG          (SOC_TASK_SLOT_CFG_BASE + 0x98)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_7_REG          (SOC_TASK_SLOT_CFG_BASE + 0x9C)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_8_REG          (SOC_TASK_SLOT_CFG_BASE + 0xA0)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_9_REG          (SOC_TASK_SLOT_CFG_BASE + 0xA4)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_10_REG         (SOC_TASK_SLOT_CFG_BASE + 0xA8)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_11_REG         (SOC_TASK_SLOT_CFG_BASE + 0xAC)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_12_REG         (SOC_TASK_SLOT_CFG_BASE + 0xB0)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_13_REG         (SOC_TASK_SLOT_CFG_BASE + 0xB4)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_14_REG         (SOC_TASK_SLOT_CFG_BASE + 0xB8)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_15_REG         (SOC_TASK_SLOT_CFG_BASE + 0xBC)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_16_REG         (SOC_TASK_SLOT_CFG_BASE + 0xC0)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_17_REG         (SOC_TASK_SLOT_CFG_BASE + 0xC4)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_18_REG         (SOC_TASK_SLOT_CFG_BASE + 0xC8)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_19_REG         (SOC_TASK_SLOT_CFG_BASE + 0xCC)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_20_REG         (SOC_TASK_SLOT_CFG_BASE + 0xD0)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_21_REG         (SOC_TASK_SLOT_CFG_BASE + 0xD4)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_22_REG         (SOC_TASK_SLOT_CFG_BASE + 0xD8)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_23_REG         (SOC_TASK_SLOT_CFG_BASE + 0xDC)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_24_REG         (SOC_TASK_SLOT_CFG_BASE + 0xE0)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_25_REG         (SOC_TASK_SLOT_CFG_BASE + 0xE4)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_26_REG         (SOC_TASK_SLOT_CFG_BASE + 0xE8)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_27_REG         (SOC_TASK_SLOT_CFG_BASE + 0xEC)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_28_REG         (SOC_TASK_SLOT_CFG_BASE + 0xF0)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_29_REG         (SOC_TASK_SLOT_CFG_BASE + 0xF4)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_30_REG         (SOC_TASK_SLOT_CFG_BASE + 0xF8)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_CORE_ID_31_REG         (SOC_TASK_SLOT_CFG_BASE + 0xFC)  /* Current block ID for each core */
#define SOC_TASK_SLOT_CFG_TS_PRIORITY_REG           (SOC_TASK_SLOT_CFG_BASE + 0x100) 
#define SOC_TASK_SLOT_CFG_TS_BW_WEIGHT_REG          (SOC_TASK_SLOT_CFG_BASE + 0x108) 
#define SOC_TASK_SLOT_CFG_TS_MIN_CORE_REG           (SOC_TASK_SLOT_CFG_BASE + 0x10C) 
#define SOC_TASK_SLOT_CFG_TS_PC_START_LO_REG        (SOC_TASK_SLOT_CFG_BASE + 0x110) /* PC start address (lower) */
#define SOC_TASK_SLOT_CFG_TS_PC_START_HI_REG        (SOC_TASK_SLOT_CFG_BASE + 0x114) /* PC start address (upper) */
#define SOC_TASK_SLOT_CFG_TS_PARAM_BASE_LO_REG      (SOC_TASK_SLOT_CFG_BASE + 0x118) /* Parameter base address (lower) */
#define SOC_TASK_SLOT_CFG_TS_PARAM_BASE_HI_REG      (SOC_TASK_SLOT_CFG_BASE + 0x11C) /* Parameter base address (upper) */
#define SOC_TASK_SLOT_CFG_TS_SMMU_SUBSID_REG        (SOC_TASK_SLOT_CFG_BASE + 0x120) 
#define SOC_TASK_SLOT_CFG_TS_TASK_CFG_REG           (SOC_TASK_SLOT_CFG_BASE + 0x124) 
#define SOC_TASK_SLOT_CFG_TS_BLK_NUM_REG            (SOC_TASK_SLOT_CFG_BASE + 0x128) /* Total block number to be launch */
#define SOC_TASK_SLOT_CFG_TS_DATA_MAIN_BASE_LO_REG  (SOC_TASK_SLOT_CFG_BASE + 0x12C) 
#define SOC_TASK_SLOT_CFG_TS_DATA_MAIN_BASE_HI_REG  (SOC_TASK_SLOT_CFG_BASE + 0x130) 
#define SOC_TASK_SLOT_CFG_TS_UB_BASE_REG            (SOC_TASK_SLOT_CFG_BASE + 0x134) 
#define SOC_TASK_SLOT_CFG_TS_DATA_SIZE_REG          (SOC_TASK_SLOT_CFG_BASE + 0x138) 
#define SOC_TASK_SLOT_CFG_TS_L2_VADDR_BASE_LO_REG   (SOC_TASK_SLOT_CFG_BASE + 0x13C) 
#define SOC_TASK_SLOT_CFG_TS_L2_VADDR_BASE_HI_REG   (SOC_TASK_SLOT_CFG_BASE + 0x140) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_CFG_REG       (SOC_TASK_SLOT_CFG_BASE + 0x144) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_0_REG   (SOC_TASK_SLOT_CFG_BASE + 0x148) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_1_REG   (SOC_TASK_SLOT_CFG_BASE + 0x14C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_2_REG   (SOC_TASK_SLOT_CFG_BASE + 0x150) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_3_REG   (SOC_TASK_SLOT_CFG_BASE + 0x154) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_4_REG   (SOC_TASK_SLOT_CFG_BASE + 0x158) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_5_REG   (SOC_TASK_SLOT_CFG_BASE + 0x15C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_6_REG   (SOC_TASK_SLOT_CFG_BASE + 0x160) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_7_REG   (SOC_TASK_SLOT_CFG_BASE + 0x164) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_8_REG   (SOC_TASK_SLOT_CFG_BASE + 0x168) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_9_REG   (SOC_TASK_SLOT_CFG_BASE + 0x16C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_10_REG  (SOC_TASK_SLOT_CFG_BASE + 0x170) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_11_REG  (SOC_TASK_SLOT_CFG_BASE + 0x174) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_12_REG  (SOC_TASK_SLOT_CFG_BASE + 0x178) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_13_REG  (SOC_TASK_SLOT_CFG_BASE + 0x17C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_14_REG  (SOC_TASK_SLOT_CFG_BASE + 0x180) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_15_REG  (SOC_TASK_SLOT_CFG_BASE + 0x184) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_16_REG  (SOC_TASK_SLOT_CFG_BASE + 0x188) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_17_REG  (SOC_TASK_SLOT_CFG_BASE + 0x18C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_18_REG  (SOC_TASK_SLOT_CFG_BASE + 0x190) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_19_REG  (SOC_TASK_SLOT_CFG_BASE + 0x194) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_20_REG  (SOC_TASK_SLOT_CFG_BASE + 0x198) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_21_REG  (SOC_TASK_SLOT_CFG_BASE + 0x19C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_22_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1A0) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_23_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1A4) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_24_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1A8) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_25_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1AC) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_26_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1B0) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_27_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1B4) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_28_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1B8) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_29_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1BC) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_30_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1C0) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_31_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1C4) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_32_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1C8) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_33_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1CC) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_34_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1D0) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_35_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1D4) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_36_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1D8) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_37_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1DC) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_38_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1E0) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_39_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1E4) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_40_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1E8) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_41_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1EC) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_42_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1F0) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_43_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1F4) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_44_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1F8) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_45_REG  (SOC_TASK_SLOT_CFG_BASE + 0x1FC) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_46_REG  (SOC_TASK_SLOT_CFG_BASE + 0x200) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_47_REG  (SOC_TASK_SLOT_CFG_BASE + 0x204) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_48_REG  (SOC_TASK_SLOT_CFG_BASE + 0x208) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_49_REG  (SOC_TASK_SLOT_CFG_BASE + 0x20C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_50_REG  (SOC_TASK_SLOT_CFG_BASE + 0x210) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_51_REG  (SOC_TASK_SLOT_CFG_BASE + 0x214) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_52_REG  (SOC_TASK_SLOT_CFG_BASE + 0x218) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_53_REG  (SOC_TASK_SLOT_CFG_BASE + 0x21C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_54_REG  (SOC_TASK_SLOT_CFG_BASE + 0x220) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_55_REG  (SOC_TASK_SLOT_CFG_BASE + 0x224) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_56_REG  (SOC_TASK_SLOT_CFG_BASE + 0x228) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_57_REG  (SOC_TASK_SLOT_CFG_BASE + 0x22C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_58_REG  (SOC_TASK_SLOT_CFG_BASE + 0x230) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_59_REG  (SOC_TASK_SLOT_CFG_BASE + 0x234) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_60_REG  (SOC_TASK_SLOT_CFG_BASE + 0x238) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_61_REG  (SOC_TASK_SLOT_CFG_BASE + 0x23C) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_62_REG  (SOC_TASK_SLOT_CFG_BASE + 0x240) 
#define SOC_TASK_SLOT_CFG_TS_L2_REMAP_ENTRY_63_REG  (SOC_TASK_SLOT_CFG_BASE + 0x244) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_0_REG (SOC_TASK_SLOT_CFG_BASE + 0x300) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_1_REG (SOC_TASK_SLOT_CFG_BASE + 0x308) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_2_REG (SOC_TASK_SLOT_CFG_BASE + 0x310) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_3_REG (SOC_TASK_SLOT_CFG_BASE + 0x318) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_4_REG (SOC_TASK_SLOT_CFG_BASE + 0x320) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_5_REG (SOC_TASK_SLOT_CFG_BASE + 0x328) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_6_REG (SOC_TASK_SLOT_CFG_BASE + 0x330) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_LO_7_REG (SOC_TASK_SLOT_CFG_BASE + 0x338) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_0_REG (SOC_TASK_SLOT_CFG_BASE + 0x304) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_1_REG (SOC_TASK_SLOT_CFG_BASE + 0x30C) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_2_REG (SOC_TASK_SLOT_CFG_BASE + 0x314) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_3_REG (SOC_TASK_SLOT_CFG_BASE + 0x31C) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_4_REG (SOC_TASK_SLOT_CFG_BASE + 0x324) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_5_REG (SOC_TASK_SLOT_CFG_BASE + 0x32C) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_6_REG (SOC_TASK_SLOT_CFG_BASE + 0x334) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_CNT_HI_7_REG (SOC_TASK_SLOT_CFG_BASE + 0x33C) 
#define SOC_TASK_SLOT_CFG_TS_CYC_CNT_LO_REG         (SOC_TASK_SLOT_CFG_BASE + 0x340) 
#define SOC_TASK_SLOT_CFG_TS_CYC_CNT_HI_REG         (SOC_TASK_SLOT_CFG_BASE + 0x344) 
#define SOC_TASK_SLOT_CFG_TS_OV_MIN_CNT_LO_REG      (SOC_TASK_SLOT_CFG_BASE + 0x348) 
#define SOC_TASK_SLOT_CFG_TS_OV_MIN_CNT_HI_REG      (SOC_TASK_SLOT_CFG_BASE + 0x34C) 
#define SOC_TASK_SLOT_CFG_TS_OV_FLOW_REG            (SOC_TASK_SLOT_CFG_BASE + 0x350) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_RANGE_EN_REG (SOC_TASK_SLOT_CFG_BASE + 0x354) 
#define SOC_TASK_SLOT_CFG_TS_PROFILING_RANGE_REG    (SOC_TASK_SLOT_CFG_BASE + 0x358) 

#endif // __TASK_SLOT_CFG_REG_OFFSET_H__
